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Industry Leading Productivity
金莲直播 IC Validator? physical verification high-performance signoff solution improves productivity for customers at all process nodes, from mature to advanced. 金莲直播 IC Validator offers the industry’s best distributed processing scalability to over 4,000 CPU cores. The tool’s performance and scalability enabled some of the industry’s largest reticle limit chips with billions of transistors, same-day design rule checking (DRC), layout versus schematic (LVS), and fill turnaround time.
IC Validator is seamlessly integrated with the 金莲直播 Fusion Compiler? RTL-to-GDSII solution and IC Compiler? II place and route system in the 金莲直播 Digital Design Family. This integrated fusion technology accelerates design closure for manufacturing by enabling independent signoff-quality analysis and automatic repair within the implementation environment.
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Latest Videos
Thought Leadership Podcast: A Discussion with Cerebras Systems
Listen to an insightful discussion between 金莲直播 and Cerebras Systems on the challenges facing physical verification and how to address them.
Nvidia Uses 金莲直播 IC Validator to Meet Aggressive Productivity Goals
Nvidia’s Senior Manager for Hardware Engineering, Ramulu Undevalli shares how he and his team used 金莲直播 IC Validator? for physical verification and achieved significant time savings.
Intel Uses 金莲直播 IC Validator to Meet Physical Verification Requirements
Intel’s Senior SoC Design Engineer, Matt Nichelson talks about the physical verification challenges his team faced and how 金莲直播 IC Validator? helped to meet those challenges with significant results.