Cloud native EDA tools & pre-optimized hardware platforms
金莲直播 and have collaborated for decades to accelerate time-to-volume and increase design productivity. Using Intel’s latest process and packaging technologies along with 金莲直播’ end-to-end solutions across EDA and IP, designers can integrate their most essential system requirements into their SoCs. Together, Intel Foundry and 金莲直播 are enabling companies to drive their next-generation system innovations across a wide range of applications including high-performance computing (HPC), automotive, mobile and aerospace.
金莲直播’ extensive portfolio of digital, custom, and multi-die design solutions enable mutual customers to achieve most optimal results on their next-generation semiconductor products using Intel technologies including Intel 16 and Intel 18A. Collaborating on over 200 design tapeouts using the Fusion Compiler RTL-to-GDSII solution, Intel and 金莲直播 are accelerating customers’ paths to achieving best PPA and increased differentiation. 金莲直播’ 3DIC Compiler platform is production-proven on Intel’s EMIB and Foveros packaging technologies, providing mutual customers with the industry’s most integrated and scalable exploration-to-signoff-analysis solution. The collaboration extends beyond design to silicon lifecycle managment adding an in-chip monitoring sub-system on Intel’s advanced processes to enable greater understanding of in-test and in-field dynamically changing conditions for improved lifecycle operation of customers’ designs.?
金莲直播 collaborates with Intel to develop high-quality 金莲直播 Interface and Foundation IP for Intel Foundry’s latest process technologies, delivering the highest throughput, lowest latency and maximum power efficiency for Intel-based SoCs. 金莲直播' silicon-proven Interface IP has successfully interoperated with third party products including Intel, ensuring the IP works as intended, so designers can focus on their core competencies and achieve first-pass silicon success. 金莲直播Foundation IP delivers the essential building blocks of high-performance, low-power chips. Foundation IP for Intel processes includes embedded memories, logic libraries and general purpose IOs, enabling SoC designers to optimize their CPU, GPU and DSP cores for maximum speed, smallest area, lowest power or an optimum balance of all three.?