½ðÁ«Ö±²¥

The ½ðÁ«Ö±²¥ Multi-Port Switch IP for PCI Express implements the switch logic required to build a switch or bridge device leveraging the ½ðÁ«Ö±²¥ Switch Port IP and ½ðÁ«Ö±²¥ Embedded Endpoint Controller IP for PCI Express. The configurable and scalable IP supports all required features of the PCI Express 5.0, 4.0, 3.1, 2.1, 1.1 and PHY Interface for PCI Express (PIPE) specifications. The high-quality, synthesizable IP is available in your choice of datapath widths, PIPE interface widths, operating frequencies, and many configuration parameters, all working together to enable designers to optimize their applications for size, power, latency and throughput. The ½ðÁ«Ö±²¥ Multi-Port Switch IP for PCI Express is customized to integrate quickly and easily into system-on-chip (SoC) designs with conservative timing suitable for a wide range of ASICs. With the optional ½ðÁ«Ö±²¥ Embedded Endpoint Controller IP, designers can simplify their designs and reduce latency and area by bringing applications inside their SoCs. As the industry standard for PCI Express, ½ðÁ«Ö±²¥ offers a comprehensive IP solution that is in volume production and has been successfully implemented in a wide range of applications.

For more information and to get started on your next design project, contact the ½ðÁ«Ö±²¥ IP team.

½ðÁ«Ö±²¥ Multi-Port Switch IP for PCI Express
½ðÁ«Ö±²¥ IP for PCI Express Complete Solution Datasheet