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Silicon to Systems Innovations for AI
Featured Speakers:
- Jitendra Mohan, CEO, Astera Labs
- Frank Ostojic, SVP & GM, ASIC Products Division, Broadcom
- Olivia Wu, AI/ML Silicon Design Lead, Meta
- Marc Hamilton, VP, 金莲直播 Architecture and Engineering, NVIDIA
- YK Cheng, Senior Director, Design Solution Exploration & Tech Benchmarking Division, TSMC
- Kevork Kechichian, EVP 金莲直播 Engineering, Arm
- Shankar Krishnamoorthy, Chief Product Development Officer, 金莲直播
Why You Should Watch On-Demand:
Gain executive-level insights into silicon and system engineering for AI hardware from experts at the forefront of these groundbreaking AI innovations. The complexity and challenges associated with advanced node implementation such as power, performance, and area (PPA) optimization, signoff challenges for multi-billion transistor chips and new complexities introduced by advanced packaging options are stretching the limits of existing solutions. The expert panelists will also explore the growing need for accelerated IP roadmaps to meet growing demands for domain-specific architectures and discuss the role of hardware-assisted verification (HAV) in validating large language model (LLM) workloads to improve the reliability and efficiency of AI applications.
Watch On-Demand
Featured Speakers
Jitendra Mohan
CEO, Astera Labs
Jitendra co-founded Astera Labs in 2017 to address performance bottlenecks in data-centric systems, bringing over two decades of engineering and management experience in the datacenter and server markets. Previously, he served as General Manager at Texas Instruments and held various technical leadership roles at National Semiconductor Corp. Jitendra holds a BSEE from IIT-Bombay, an MSEE from Stanford University, and has over 35 granted patents.
Jitendra co-founded Astera Labs in 2017 to address performance bottlenecks in data-centric systems, bringing over two decades of engineering and management experience in the datacenter and server markets. Previously, he served as General Manager at Texas Instruments and held various technical leadership roles at National Semiconductor Corp. Jitendra holds a BSEE from IIT-Bombay, an MSEE from Stanford University, and has over 35 granted patents.
Frank Ostojic
SVP & GM, ASIC Products Division, Broadcom
Frank Ostojic is the Senior Vice President and General Manager of the ASIC Custom Products Division (APD), a position he has held since 2007. He oversees product strategy to drive growth in Machine Learning, Storage, Wireless Infrastructure, Networking, and Computing ASIC markets, and leads the development of IP for complex custom ASICs. With a background as a design engineer since 1996, he has held various senior roles following his education in Electrical Engineering from Brigham Young University and Colorado State University.
Frank Ostojic is the Senior Vice President and General Manager of the ASIC Custom Products Division (APD), a position he has held since 2007. He oversees product strategy to drive growth in Machine Learning, Storage, Wireless Infrastructure, Networking, and Computing ASIC markets, and leads the development of IP for complex custom ASICs. With a background as a design engineer since 1996, he has held various senior roles following his education in Electrical Engineering from Brigham Young University and Colorado State University.
Olivia Wu
AI/ML Silicon Design Lead, Meta
Olivia Wu is the ML Design Lead at Meta, overseeing the design of AI inference and training accelerators for the company's data center workloads. Previously, she held senior technical leadership roles at Intel, Nervana Systems, Cisco, Procket Networks, and Sun Microsystems, contributing to high-performance server processors and AI training ASICs. Olivia holds an MSEE from Purdue University and has 16 patents.
Marc Hamilton
VP, 金莲直播 Architecture and Engineering, NVIDIA
Marc Hamilton leads the worldwide solutions architecture and engineering team at NVIDIA, focusing on delivering end-to-end solutions for artificial intelligence, deep learning, professional visualization, and high-performance computing. Before joining NVIDIA in 2013, he worked at HP and Sun Microsystems, and developed HPC applications for the U.S. aerospace and defense industry at TRW. Hamilton holds a B.S. in math and computer science from UCLA and an M.S. in electrical engineering from the University of Southern California.
YK Cheng
Senior Director, Design Solution Exploration & Tech Benchmarking Division, TSMC
Dr. Yi-Kan (YK) Cheng is an R&D Senior Director at TSMC, managing the Design Solution Exploration & Technology Benchmarking Division since 2005. He has led the development of TSMC’s Reference Design Flow and advanced-node design activities. Previously, he worked at IBM and Intel on timing optimization and IC reliability, and he holds a Ph.D. from the University of Illinois at Urbana-Champaign, along with over 100 US patents.
Kevork Kechichian
EVP 金莲直播 Engineering, Arm
Kevork leads a team at Arm that collaborates with its partner ecosystem to develop and accelerate technologies in response to market needs. With 30 years of experience in semiconductor engineering and leadership, he was previously the Executive Vice President of MCU/MPU Engineering at NXP Semiconductors and Senior Vice President of Engineering at Qualcomm, where he oversaw the Snapdragon SoC teams. Kevork holds a BEng from the American University of Beirut and an MS in Electrical Engineering from Concordia University.
Shankar Krishnamoorthy
Chief Product Development Officer, 金莲直播
Shankar Krishnamoorthy leads the Technology & Product Development Group (TPG) at 金莲直播, focusing on innovative, scalable products across various domains, including design, verification, and silicon lifecycle management. Previously, he held executive roles at 金莲直播, including GM of the Electronic Design Automation Group, and served as GM at Mentor Graphics before rejoining 金莲直播 in 2017. Shankar holds an M.S. in Computer Science from the University of Texas, Austin, and a bachelor's degree from the Indian Institute of Technology, Bombay.