金莲直播

Fergus Casey

Fergus Casey

Fergus Casey is the Executive Director of R&D for Processor IP at 金莲直播, responsible for Processor IP development across a broad portfolio, including ARC RISC, DSP Processors, Neural Network (NPX) Processors, and Safety and Security enabled Processors. Over the years with 金莲直播, Fergus' team has been first to market with state-of-the-art AI accelerators and safety and security-ready processors, earning industry awards from the Linley Group and Embedded Vision Alliance. Prior to joining 金莲直播, Fergus worked at several fabless semiconductor and IP startups. He holds a bachelor’s degree in electrical engineering from University College Cork, Ireland.