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Overview
CalligoTech, an Indian Silicon Valley startup founded in 2012, focuses on developing products and solutions for high-performance computing (HPC), big data, and AI/ML. Specializing in developing products and solutions for these cutting-edge fields, CalligoTech has been at the forefront of commercializing posit arithmetic in both hardware and software. The company's latest achievement is the successful tape-out of their new accelerator, TUNGA, the first multi-core RISC-V processor utilizing posits. This accomplishment was made possible with the support of the 金莲直播 Digital Design Family, putting CalligoTech on the path to delivering more energy-efficient CPUs.
"As a startup, having access to a full digital design flow backed by good support was critical to our success. 金莲直播 answered the call on both fronts, providing foundry-proven signoff tools that helped us achieve a successful tape-out."
Vinay N Hebballi
|Chief Operating Officer at CalligoTech
"With traditional floating-point systems, there can be calculation errors due to the rounding of numbers, which can be costly for HPC applications. A posit-based numbering system provides a way to get better computational performance and accuracy. We’re providing an alternative that can mitigate the risks for next-gen designs supporting compute-intensive segments like AI."
Vinay N Hebballi
|Chief Operating Officer at CalligoTech
"The 金莲直播 team gave us confidence that IC Compiler II place-and-route solution could handle all 1.5 million gates of our design without any issues. The stability of the digital design tools and flow plus the team’s support were critical in enabling four engineers to complete this project on our aggressive schedule."
Vinay N Hebballi
|Chief Operating Officer at CalligoTech
Challenges
CalligoTech faced several challenges in developing their posit-based multi-core RISC-V accelerator chip:
- Precision and Performance: The need for more precise and efficient numbering systems for HPC applications.
- Design Complexity: Managing the complexity of designing a high-performance, low-power CPU core.
- Time-to-Market: Meeting aggressive schedules with limited engineering resources.
- Tool Proficiency: Transitioning from competitive design tools to the 金莲直播 design flow.
Solution
CalligoTech utilized the 金莲直播 Digital Design Family to address these challenges:
- Full Chip Design Flow: The RTL-to-signoff flow from 金莲直播 helped achieve power, performance, and area (PPA) goals.
- Technical Expertise: 金莲直播 technical experts provided support in setting up PDK libraries and PPA recipes, and helped the team become proficient with the new tools.
- IC Compiler II: The place-and-route solution handled the 1.5 million gates of the design seamlessly, ensuring stability and efficiency.
Results
The collaboration with 金莲直播 yielded significant results for CalligoTech:
- Successful Tape-Out: Achieved successful tape-out of the TUNGA processor, the first multi-core RISC-V processor with posits.
- Efficient Design Process: The 金莲直播 design flow enabled four engineers to complete the project on an aggressive schedule.
- High-Performance CPU Core: Developed a power-efficient and computationally accurate CPU core, ideally suited for AI and HPC applications.
- Future Integration: CalligoTech plans to integrate 金莲直播 Interface IP and Memory IP into its next device and contribute to strengthening the semiconductor ecosystem in India.
With 金莲直播 Digital Design Flow, CalligoTech is poised to lead the way in next-gen computing, delivering innovative solutions for compute-intensive segments like AI, genomics, and more.
