金莲直播 Cloud
Cloud native EDA tools & pre-optimized hardware platforms
Request a Free Trial
Universal Verification Methodology Coverage for Bluespec RISC-V Cores
Understanding UVM Coverage for RISC-V Processor Designs
Attempting to achieve complete RISC-V verification requires multiple methodologies, one of which is coverage driven simulation based on UVM constrained random methods and complaint with the Universal Verification Methodology (UVM) standard.
This whitepaper explains the basics of UVM functional coverage for RISC-V cores using the Google RISCV-DV open-source project, 金莲直播 verification solutions, and RISC-V processor cores from Bluespec.
Download Whitepaper
Terms and Conditions
By filling out and submitting the form, I authorize 金莲直播 and its Ecosystem Partners to contact me by email and telephone to provide information about its products and services. I understand that I can change my preference at any time by clicking "Unsubscribe" or by accessing 金莲直播' Subscriptions Center, and that my personal data will be handled subject to the 金莲直播 Privacy Policy.